AQA A-Level Computer Science (7517)

## Learning Outcomes

- Distinguish clearly between machine code and assembly language
- Identify the parts of an instruction, including opcode, operand, and addressing mode
- Interpret AQA-style assembly syntax such as Rd, Rn, Rm, `<operand2>`, and `<memory ref>`
- Explain the difference between immediate addressing and direct addressing
- Trace short assembly programs involving load, store, arithmetic, compare, and branch instructions
- Avoid common exam mistakes when reading or writing AQA Paper 2 assembly language

## AQA A-Level Computer Science (7517) Syllabus

For the AQA A-Level Computer Science (7517), you are expected to understand machine code and assembly language operations, with a focus on the following syllabus points:

- Know that **machine code** is the binary form of instructions executed directly by the processor
- Understand that **assembly language** uses mnemonics to represent machine code instructions
- Identify the parts of an instruction: **opcode** and one or more **operands**
- Explain how **immediate addressing** differs from **direct addressing**
- Interpret and use AQA-style instructions such as **LDR**, **STR**, **MOV**, **ADD**, **SUB**, **CMP**, **B**, **BEQ**, **BNE**, **BGT**, **BLT**, **AND**, **ORR**, **EOR**, **MVN**, **LSL**, **LSR**, and **HALT**
- Understand the roles of **destination registers** and **source registers** in register-based assembly
- Explain how **CMP** works with conditional branch instructions to alter control flow
- Trace the effect of a short assembly program on registers and memory

## Test Your Knowledge

_Attempt these questions before reading this article. If you find some difficult or cannot remember the answers, look more closely at that area during your revision._

1. What is the difference between machine code and assembly language?
2. What is the difference between an opcode and an operand?
3. How does immediate addressing differ from direct addressing?
4. What does `CMP` do, and how is it used with `BEQ` or `BNE`?
5. Why is `MOV R0, #5` not the same as `LDR R0, 5`?

## Introduction

Machine code and assembly language sit very close to the hardware. In Paper 2, this topic tests whether you can read instructions in a low-level form, explain exactly what they do, and trace the state of registers and memory step by step. That means this is not only a definitions topic. It is an application topic.

A common reason students lose marks is that they know the mnemonic roughly, but not precisely. For example, they may know that `LDR` means load, but then confuse loading a literal value with loading from a memory address. The exam rewards exact reading of syntax.

> **Key Term: machine code**
> Binary-encoded instructions executed directly by the processor.

## Introduction to machine code, assembly language, and instruction structure

A processor can only execute instructions in machine code: patterns of bits. These bit patterns form the processor's **instruction set**, which is the list of commands that processor recognises. Different processors have different instruction sets, so machine code is hardware-specific.

Assembly language is a text form of low-level programming that uses short command names called mnemonics. Instead of writing a binary pattern, a programmer writes something like `ADD R0, R1, R2`. This is easier for a human to read, but it still maps closely to the hardware.

> **Key Term: assembly language**
> A low-level language that uses mnemonics to represent machine code instructions.
>
> **Key Term: mnemonic**
> A short text label used to represent an operation in assembly language, such as `ADD` or `LDR`.

Each assembly instruction usually corresponds to one machine code instruction. That one-to-one relationship matters because assembly is still very close to the processor's real operations. It is not like a high-level language statement, which may become many machine code instructions after translation.

An assembler translates assembly language source code into machine code object code.

> **Key Term: instruction set**
> The set of operations and instruction formats a processor recognises and can execute.

Every instruction contains at least two ideas:

- what operation to perform
- what data, register, or address to use

These are called the **opcode** and the **operand(s)**.

> **Key Term: opcode**
> The part of an instruction that specifies the operation to be carried out.
>
> **Key Term: operand**
> The value, register, or memory reference used by an instruction.

For AQA, be careful with wording. The opcode is not the whole instruction. The instruction includes the opcode plus its operand or operands.

AQA uses a register-based style of assembly, not an accumulator-based style. This matters because some textbooks or websites use instructions like `LDA` or `STA`, but AQA questions use mnemonics such as `LDR`, `STR`, `MOV`, and `ADD` with explicit registers.

For example:

```txt
ADD R0, R1, R2
```

This means:

- take the value in `R1`
- add the value in `R2`
- store the result in `R0`

Here:

- `R0` is the destination register
- `R1` and `R2` are source registers
  > **Key Term: register**
  > A small, fast storage location inside the processor used to hold data or instructions temporarily.
  >
  > **Key Term: destination register (Rd)**
  > The register where the result of an instruction is stored.
  >
  > **Key Term: source register (Rn/Rm)**
  > A register supplying input data to an instruction.

So in `ADD Rd, Rn, <operand2>`:

- `Rd` receives the answer
- `Rn` supplies the first value
- `<operand2>` supplies the second value, either as a literal or from another register
  > **Test Tip:** In AQA syntax questions, first identify where the answer ends up. That is usually the destination register. Students often read left to right and assume all listed registers are inputs.

## Core AQA assembly operations and what they actually do

The most useful way to revise the instruction set is by grouping operations by function.

### Data transfer operations

These move data between memory and registers.

- `LDR Rd, <memory ref>` loads data from memory into a register
- `STR Rd, <memory ref>` stores data from a register into memory
- `MOV Rd, <operand2>` copies a value into a register

The difference between `LDR` and `MOV` is easy to miss.

Example:

```txt
MOV R0, #25
```

This puts the value 25 directly into `R0`.

Example:

```txt
LDR R0, 120
```

This loads into `R0` whatever value is stored at memory location 120. If memory location 120 contains 25, then `R0` becomes 25. If it contains 91, then `R0` becomes 91.

That is why value and address must never be mixed up.

Worked example:

Assume:

- `R2 = 5`
- memory location `103 = 12`

Instruction 1:

```txt
STR R2, 103
```

Effect:

- copy the contents of `R2` into memory location 103
- memory location 103 becomes 5

Instruction 2:

```txt
LDR R0, 103
```

Effect:

- fetch the contents of memory location 103
- copy that value into `R0`
- `R0` becomes 5

This shows the full path of data movement: register to memory, then memory back to register.

> **Key Term: direct addressing**
> An addressing mode where the operand gives the address of the data rather than the data itself.

### Arithmetic and compare operations

These perform numeric work.

- `ADD Rd, Rn, <operand2>`
- `SUB Rd, Rn, <operand2>`
- `CMP Rn, <operand2>`

Example:

```txt
ADD R3, R1, R2
```

If `R1 = 7` and `R2 = 4`, then `R3 = 11`.

Example with an immediate value:

```txt
SUB R4, R4, #1
```

If `R4 = 10`, then after execution `R4 = 9`.

`CMP` is different from `SUB`. It compares two values, usually by subtraction internally, but it does not store the subtraction result in a destination register. Instead, it updates condition information used by later branch instructions.

Example:

```txt
CMP R0, #10
```

This checks whether the value in `R0` is equal to, greater than, or less than 10.

> **Key Term: immediate addressing**
> An addressing mode where the operand is the actual value to be used, written in AQA syntax with `#`.

A key distinction:

- `SUB R1, R1, #1` changes `R1`
- `CMP R1, #1` does not change `R1`; it only prepares for a conditional branch
  > **Test Tip:** If you see `CMP`, expect a branch instruction soon after. The exam often tests them as a pair because `CMP` by itself does not alter program flow.

### Logical and shift operations

These work on bit patterns.

- `AND`
- `ORR`
- `EOR`
- `MVN`
- `LSL`
- `LSR`

These often appear in tracing questions because they check whether you can think in binary, not just decimal.

Example:

```txt
AND R0, R1, #15
```

This performs a bitwise AND between the contents of `R1` and the binary form of 15.

If `R1 = 13`, then in binary:

- 13 = `00001101`
- 15 = `00001111`

Bitwise AND gives:

- `00001101`
- `00001111`
- result `00001101`

So `R0 = 13`.

Example:

```txt
LSL R2, R2, #1
```

This logically shifts the bits in `R2` one place left. In effect, for a positive unsigned value, this usually doubles the value, though bits shifted out are lost.

If `R2 = 6`:

- 6 in binary is `00000110`
- shift left by 1 gives `00001100`
- result is 12

Likewise, `LSR` shifts right and usually halves an unsigned value, ignoring remainders.

### Branch operations and control flow

Branch instructions change which instruction runs next. Without branches, a program would only run in straight sequence.

AQA includes:

- `B <label>` for unconditional branch
- `BEQ <label>` branch if equal
- `BNE <label>` branch if not equal
- `BGT <label>` branch if greater than
- `BLT <label>` branch if less than
- `HALT` to stop execution
  > **Key Term: branch instruction**
  > An instruction that changes the normal sequential flow of execution by jumping to another part of the program.

A branch uses labels to name target positions in the code.

Example:

```txt
CMP R0, #0
BEQ end
MOV R1, #1
end:
HALT
```

How it works:

- compare `R0` with 0
- if equal, jump to `end`
- if not equal, continue to `MOV R1, #1`
- then eventually stop at `HALT`

So whether `MOV` runs depends on the result of the comparison.

## Addressing modes and tracing whole programs

Addressing modes are heavily tested because they show whether you can read the syntax precisely.

Immediate addressing means the operand is the value itself.

Example:

```txt
MOV R1, #5
```

`R1` becomes 5.

Direct addressing means the operand is an address where the value is stored.

Example:

```txt
LDR R1, 100
```

`R1` becomes the contents of memory location 100.

Students often say both “load 5”, but these are not the same action.

Side-by-side comparison:

- `MOV R1, #5` → put literal value 5 into `R1`
- `LDR R1, 5` → go to memory address 5 and copy that stored value into `R1`

If memory address 5 contains 42, then the second instruction makes `R1 = 42`, not 5.

Worked trace:

Assume initial values:

- `R0 = 0`
- `R1 = 7`
- memory location `100 = 3`

Program:

```txt
LDR R0, 100
ADD R0, R0, R1
CMP R0, #10
BEQ done
SUB R0, R0, #1
done:
STR R0, 100
HALT
```

Step by step:

1. `LDR R0, 100`
   - load contents of memory location 100 into `R0`
   - `R0 = 3`

2. `ADD R0, R0, R1`
   - `R0 = 3 + 7`
   - `R0 = 10`

3. `CMP R0, #10`
   - compare `R0` with 10
   - equal condition is true

4. `BEQ done`
   - branch to `done` because comparison showed equality
   - skip the next instruction

5. `SUB R0, R0, #1`
   - not executed

6. `STR R0, 100`
   - store `R0` into memory location 100
   - memory location 100 becomes 10

7. `HALT`
   - stop program

Final state:

- `R0 = 10`
- memory location `100 = 10`

This example shows why tracing must be done line by line. You cannot read the code only by spotting keywords. You must check whether the branch occurs.

A second worked example with `BNE`:

Initial values:

- `R2 = 4`

Program:

```txt
CMP R2, #5
BNE notequal
MOV R0, #1
B end
notequal:
MOV R0, #0
end:
HALT
```

Reasoning:

- compare 4 with 5
- they are not equal
- `BNE notequal` is taken
- `MOV R0, #1` is skipped
- `MOV R0, #0` runs
- final `R0 = 0`
  > **Test Tip:** In a trace question, do not assume every instruction runs. Put a mark beside any branch target and explicitly decide whether the jump happens before continuing.

## Common exam traps and how to avoid them

The first trap is mixing up AQA syntax with other pseudo-assembly systems. In AQA questions, stick to the given instruction set. Do not invent commands from elsewhere.

The second trap is confusing immediate and direct addressing.

Wrong thinking:

- “`LDR R0, 100` loads 100 into `R0`.”

Correct thinking:

- it loads the contents stored at address 100 into `R0`

The third trap is treating `CMP` like arithmetic storage.

Wrong thinking:

- “`CMP R1, #8` stores the difference.”

Correct thinking:

- it updates comparison information for the next conditional branch

The fourth trap is mixing destination and source registers.

For example:

```txt
ADD R0, R1, R2
```

Correct reading:

- answer goes into `R0`

Not:

- add `R0` and `R1`

The fifth trap is ignoring that the AQA instruction set is provided in the exam. This means memorising every detail is less useful than being able to apply the syntax accurately.

A strong exam answer usually does three things well:

- uses the exact mnemonic meaning
- states where data comes from
- states where the result is stored

For example, instead of saying “this adds some values”, say:

- “The value in `R2` is added to the value in `R1`, and the result is stored in `R0`.”

That precision is what gains marks.

## Key Point Checklist

_This article has covered the following key knowledge points:_

- Machine code is the binary form of instructions executed directly by the processor
- Assembly language uses mnemonics as a human-readable form of low-level instructions
- Each processor has its own instruction set, so machine code and assembly language are hardware-specific
- An instruction contains an opcode and one or more operands
- In AQA syntax, `Rd` is the destination register and `Rn`/`Rm` are source registers
- Immediate addressing uses the actual value in the instruction, shown with `#`
- Direct addressing uses an address that refers to where data is stored
- `MOV R0, #5` places the value 5 into `R0`, while `LDR R0, 5` loads the contents of memory location 5
- `LDR` loads from memory to a register, and `STR` stores from a register to memory
- `CMP` compares values and updates condition information but does not store a normal arithmetic result
- Branch instructions such as `BEQ`, `BNE`, `BGT`, and `BLT` change control flow based on the most recent comparison
- `HALT` stops program execution

## Key Terms and Concepts

- machine code
- assembly language
- mnemonic
- instruction set
- opcode
- operand
- register
- destination register (Rd)
- source register (Rn/Rm)
- direct addressing
- immediate addressing
- branch instruction


Computer Organisation and Architecture - Machine code and assembly language operations